The investor half, made operational. Every technical insight you've built — moats, bottlenecks, the inference cost stack — now has to show up in one of three places: the TAM, the margin, or the multiple. This lesson is how your engineering taste becomes a price.
You can now read these companies better than most analysts at the technical level. This lesson converts that into the thing the mission is about: a defensible, independent valuation view. The trick is that valuation is not a separate skill bolted on — every technical fact you've learned maps directly to one of three valuation inputs. A moat shows up as margin and as a durable multiple; a bottleneck shows up as pricing power (margin) and share of TAM; cyclicality shows up as a multiple discount. Learn the map and you can price a name from first principles.
Core thesis: Value = TAM × share × margin × multiple. The first three are the business; the fourth is the market's judgment of growth × durability × cyclicality. Your technical edge is knowing which input each company's moat actually moves — and spotting the single most dangerous error in semis: valuing peak-cycle earnings at a peak-cycle multiple (double-counting the boom). Get the map right and the per-name signals tell you when the thesis is working.
Why decompose rather than quote a P/E? Because each input fails differently, and your technical knowledge gives you an edge on a specific one. You might agree on TAM but believe a moat protects margin longer than consensus (NVDA gross margin); or agree on margin but think the multiple is too low because the cut is socket-agnostic (ASML, EDA); or think the market is valuing peak share as permanent. Naming your disagreement is the whole game.
Two ways to size a TAM: top-down (analyst market forecasts) and bottom-up (your favorite — build it from physical reality). You already have the bottom-up engine: hyperscaler capex (~$750B in 2026) flows into known buckets (L20's dollar trace). Anchor numbers, all grounded:
| Market | Now | Forecast | Read-through |
|---|---|---|---|
| AI accelerators (GPU+ASIC) | — | >$1T/yr by 2030 | NVDA + AMD + AVGO-designed ASICs fight over this |
| Data-center GPUs | ~$100B (2024) | ~$215B (2030) | The merchant-GPU slice specifically |
| Data-center semis (all) | $209B (2024) | ~$500B (2030) | Compute + memory + networking + power silicon |
| HBM | tight; +130% units '25 | ~$100B TAM by 2028 | SK Hynix ~50% share → the cleanest memory bet |
Sources: accelerator TAM, DC semi TAM, HBM.
Share is where your moat knowledge pays. A monopoly (ASML EUV) keeps ~100% of its TAM; a duopoly (SK Hynix/Samsung/Micron in HBM) shares it; a contested socket (NVDA vs AMD vs ASICs) has share that can move — which is exactly what the THESIS.md falsifiers track. The durability of share is a technical question you can now answer.
Gross margin is the single cleanest financial fingerprint of a moat: it's what pricing power looks like in numbers. Map the moat types you learned to the margins they produce:
| Moat type (from the course) | Gross margin | Example |
|---|---|---|
| Software / IP toll booth | ~85–90% | Cadence/Synopsys (EDA), NVDA software value |
| Monopoly hardware | ~50%+ | ASML (EUV) — high for capital equipment |
| Full-stack systems leader | ~71–75% | NVIDIA (data-center) |
| Process monopoly (capital-heavy) | ~64–66% | TSMC |
| Cyclical commodity (yield-gated) | ~30–60% (swings!) | SK Hynix / memory |
NVDA ~71–75%, TSMC ~64–66% per recent quarters. [TSMC/NVDA margins]
Diligence use: a change in gross margin is the earliest quantitative signal that a moat is shifting. NVDA gross margin slipping toward the low-60s would be your first hard evidence that ASIC/AMD competition (the L16 falsifier) is biting — visible in the financials before it's in the narrative. Watch the trend, not the level.
The multiple (P/E, EV/EBITDA) encodes three things: growth (faster → higher), durability (more certain → higher), and cyclicality (more cyclical → lower, because the market discounts earnings it doesn't trust to persist). This is why a socket-agnostic toll booth deserves a higher multiple than a memory maker even at similar growth:
The single most dangerous mistake in semis — the double-count: valuing peak-cycle earnings at a peak-cycle multiple. In a boom, a memory maker's earnings spike and its multiple expands, so the price looks "cheap on P/E" exactly at the top. The fix: normalize to mid-cycle earnings, and apply a multiple that reflects the through-cycle business, not the peak. The cyclical-double-count is how investors who understood the technology still lost money — they bought peak earnings as if permanent.
| Name | Tier | Gross margin | The ONE signal that moves it |
|---|---|---|---|
| ASML | toll | ~50% | Net new bookings (EUV + High-NA); China revenue mix |
| Cadence/Synopsys | toll | ~85–90% | Recurring-revenue % + backlog/renewals; design starts |
| TSMC | toll | ~65% | Capex guide + advanced-node utilization + CoWoS capacity |
| NVIDIA | leader | ~71–75% | Data-center revenue trajectory and gross-margin trend (erosion = competition) |
| Broadcom | leader | ~60%+ | Custom-ASIC/AI revenue + new XPU customer wins |
| AMD | leader | ~50% | Data-center GPU revenue ramp; ROCm/rack-scale wins (the L16 catalyst) |
| SK Hynix | cyclical | ~30–60% | HBM ASP + bit shipments; the broader DRAM cycle (double-count risk highest here) |
Notice the pattern: the toll-booth tier (ASML, EDA, TSMC) is valued on durability — their signals are bookings/backlog/utilization, and their risk is a capex air-pocket, not displacement. The leader tier (NVDA, AVGO, AMD) is valued on share + margin durability — their signals are revenue ramp and margin trend, and their risk is competition (the falsifiers). The cyclical tier (SK Hynix) is valued on where we are in the cycle — its signal is ASP, and its risk is buying the peak. Three different games requiring three different valuation lenses.
Read first: Stratechery (in RESOURCES.md) for how technical/business structure becomes durable value — the qualitative side of the multiple. Pair with: SemiAnalysis for TAM/margin teardowns, and primary 10-K/earnings releases (e.g. NVIDIA's filings) to read gross-margin and segment trends yourself rather than via headlines.
Select the best answer for each.
1. In the framework Value = TAM × share × margin × multiple, a moat shows up most directly as:
2. The "cyclical double-count" error in semiconductor valuation is:
3. Why does a socket-agnostic toll booth (ASML, EDA) deserve a higher multiple than memory?
4. The earliest quantitative sign that NVIDIA's competitive moat is eroding would be:
5. A cyclical memory name trading on a low P/E at peak earnings is most likely:
6. A well-formed valuation thesis is best described as: